KISHORE KUMAR VINOD. Achieving Logic Verification Closure in State-Dependent RTL Designs through Optimized Test Sequences. International Journal of Information Technology and Electrical Engineering (IJITEE), [S. l.], v. 13, n. 3, p. 1–10, 2024. Disponível em: https://ijitee.com/index.php/home/article/view/IJITEE_13_03_001.. Acesso em: 26 oct. 2025.